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  4. FastLane: Software Transactional Memory Optimized for Low Numbers of Threads

FastLane: Software Transactional Memory Optimized for Low Numbers of Threads

Author(s)
Wamhoff, Jons-Tobias
Rivière, Etienne  
Chaire de systèmes complexes  
Muller, Gilles
Fetzer, Christof
Felber, Pascal  
Conseil de l'Université  
Date issued
2014
From page
35
To page
36
Reviewed by peer
TRUE
Event name
Software Engineering
Publication type
conference paper
Identifiers
https://libra.unine.ch/handle/20.500.14713/21432
DOI
https://dl.gi.de/handle/20.500.12116/31020
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WamhoffRMFF14.pdf

Type

Main Article

Size

1.27 MB

Format

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