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  4. FastLane: improving performance of software transactional memory for low thread counts

FastLane: improving performance of software transactional memory for low thread counts

Author(s)
Wamhoff, Jons-Tobias
Fetzer, Christof
Felber, Pascal  
Conseil de l'Université  
Rivière, Etienne  
Chaire de systèmes complexes  
Muller, Gilles
Date issued
2013
From page
113
To page
122
Reviewed by peer
TRUE
Event name
PPoPP
Project(s)
VELOX: An Integrated Approach to Transactional Memory on Multi and Many-core Computers  
Publication type
conference paper
Identifiers
https://libra.unine.ch/handle/20.500.14713/21383
DOI
https://doi.org/10.1145/2442516.2442528
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WamhoffFFRM13.pdf

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