VLSI systems for image compression : a power-consumption/image-resolution trade-off approach

Low power consumption is a requirement for any battery powered portable equipment. When designing ASICs for image and video compression, emphasis has been placed mainly on building circuits that are fast enough to satisfy the high data throughput associated with image and video processing. The imminent development of portable systems featuring full multimedia applications, adds the low-power constraint to the design of VLSI circuits for this kind of application. Several techniques such as lowering the supply voltage, architectural parallelization, pipelining etc., have been proposed in the literature to achieve low-power consumption. In this paper we report a VLSI circuit featuring a power management user-controllable technique that trades image quality for power consumption in a transform-based algorithm.