Development of an electroless post-processing technique for depositing gold as electrode material on CMOS devices

The limited electrode density and thus, the limited spatial resolution of substrate-integrated microelectrodes arrays (MEAs) used in in-vitro electrophysiology are currently considered as the main constraints of this technique. By taking advantage of the commercially available complementary metal oxide semiconductor (CMOS) standard technology, high density miroelectrode arrays on large active areas could be realized. However, the aluminum alloy used in CMOS as the metallic layer shows poor electrochemical stability in physiological media as well as a poor biocompatibility. A post-processing technique is therefore necessary for depositing a suitable electrode material. The methodology developed in this work relies on a gold electroless deposition technique using commercially available gold cyanide plating solutions. The main advantage of the electroless process is that it needs neither a photolithographic step nor the application of a reduction potential. The electroless process was developed in two stages, to begin with on aluminum–MEAs test structures and then the optimized process was transposed to the CMOS devices. The gold layers were characterized by ESEM, cyclic voltammetry and XPS.